A Memristor-Crossbar/CMOS Integrated Network for Pattern Classification and Recognition

A novel circuit model based on a trainable memristorcrossbar network integrated with a CMOS circuit for pattern classification and recognition is proposed and analyzed in this paper. The configurable memristors along each column wires of the crossbar are trained by a standard pattern input from the row wires of the crossbar to represent the pattern. After the training, the crossbar network can classify unknown patterns input from the row wires, and the output current from each column wire will be normalized by the CMOS circuits to denote the probability to classify the unknown patterns with respect to the standard pattern associated with the column wire. The probabilities can be further processed by a winner-take-all competition circuit for decision making. The circuit simulation results demonstrate that the proposed circuit based on our experimentally demonstrated memristor devices can classify patterns by calculating the probabilities and recognize patterns with distortions. Moreover, the circuit delay for classifying a pattern remains below 1 μs even when the pattern scales up to large dimensions. The large-scale parallel signal processing by the memristor-crossbar/CMOS circuit enables it to classify and recognize patterns with high dimensionality and complexity at a much faster speed than the software-based computers. Keywords-pattern classification; recognition; memristor; crossbar; CMOS analog integrated circuits; probability